Fpga-based Pid Controller Using Sopc Technology For Dc Motor Speed Control

Résumé: This project is about designing and implementing a DC motor speed controller using Proportional Integral Derivative (PID) algorithm. The controller was implemented on a Field Programmable Gate Array (FPGA) based on System-On- Programmable-Chip (SOPC) technology. The main objective of this project is to control the speed of DC motor to reach a set point. The PID controller attempts to correct the error between a measured process variable and the desired set point by calculating and then outputting a corrective action that can adjust the process accordingly using Pulse Width Modulation (PWM) technique. The system was divided into hardware and software sections. SOPC Builder has been used to design and implement the system-on-chip hardware system that goes inside the FPGA (DE2 Board). The latter employs a NIOS II processor linked to a PWM hardware block. The processor calculates the error between the current and set point speeds and generates a PWM output signal with a specific duty cycle using C software. Finally, the PID controller successfully achieved its target by driving the motor to any set point with an average steady state error of 3.25% and a settling time of 0.127 seconds.

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